The growth of information technology trends such as Internet of Things (IoT), big data, neuromorphic computing, etc has led to a significant demand on CMOS-based circuitry in terms of memory, processing speed and power consumption. Conventional memory technologies such as DRAM and SRAM are not suitable due to increasing leakage, large footprint, amongst others. On the other hand, emerging non-volatile memory technology such as magnetoresistive random access memories (MRAM) have a significant advantage owing to their scalability, low power operation, CMOS compatibility and ideally unlimited endurance. MRAMs, which consist of ferromagnet/insulator/ferromagnet-based building blocks, work on the principle of aligning the magnetization of one ferromagnetic layer with respect to another. This relative orientation of the magnetizations in the two layers is used to define a '1' or a '0', like in a memory bit-cell. As the information is stored in the material state, it is expected to last forever in ideal conditions, unless altered by external influences. However, heating effects during write operations, and the scaling of device parameters as a function of physical dimension (CD) suggest that this is not the case. One pivotal parameter - 'Thermal stability' (D) - defines the data retention time of the device at a given temperature. For devices with a CD in a similar range to its constituent magnetic domains (~20-30 nm), a well-known 'macrospin' analytical expression exists to determine the thermal stability. For devices with larger CDs, where the switching mechanism is known to be mediated by domain wall-based nucleation and propagation, no analytical model has been defined yet. As we scale down to nodes of 14nm and below, the MRAM device CDs remain in the 'domain wall regime' due to circuit scaling simulations thereby making it imperative to understand the underlying physics.
Extensive research in the past few years based on numerical simulations have helped to visualize the necessary conditions for switching and the resulting switching paths, yet an analytical understanding remains elusive. The scope of this dissertation, therefore, will be to understand the physics of domain wall switching in a variety of scaled magnetic structures, specifically circular devices, and propose an analytical model to accurately predict MRAM-like operation in the expected CD regime. The candidate will be engaged in:
- Experimental work such as device fabrication and electrical characterization, which will be supported by modelling such as micromagnetic simulations using well-known software packages (OOMMF, Mumax, etc). The fabrication aspect of this work will focus on making simplified device structures for preliminary assessments.
- Further tasks will involve understanding domain wall nucleation and propagation mechanisms by experimental techniques such as magneto-optic Kerr effect (MOKE) imaging, ferromagnetic resonance and pulse-induced switching studies. These experiments will extract critical material parameters necessary for further modelling efforts.
- Incorporating and simulating temperature effects (both ambient and self-heating induced) in the magnetization dynamics of the DW-based structures will be a critical task of this project, and will build on existing in-house models and understanding.
In summary, the candidate will pursue a comprehensive understanding of magnetization dynamics in spintronic structures influenced by domain wall-dynamics and temperature effects, thereby delivering an industry and academic-relevant analysis. This work will require extensive collaboration with other members of the MRAM team namely device, integration, thin film, patterning and modelling experts. Collaborations with other research groups outside IMEC will also be encouraged.
Required background: Masters of Physics, or Material Science is a must. Knowledge of magnetism and micromagnetics is a strong plus.
Type of work: 10% literature, 50% experimental, 40% modelling and simulation
Supervisor: Marc Heyns, Jan Van Houdt
Daily advisor: Siddharth Rao
The reference code for this position is 1812-12. Mention this reference code on your application form.