/DFT Architect (temporary assingment)

DFT Architect (temporary assingment)

Research & development - Leuven | Just now

Architect DFT solutions for SOCs with multiple sub-blocks-partitions and complex soft-hard IPs with complex DFT requirements Coordinate-Negotiate DFT requirements with the project teams and the customers

DFT Architect (temporary assignment)

Architect DFT solutions for SOCs with multiple sub-blocks-partitions and complex soft-hard IPs with complex DFT requirements Coordinate-Negotiate DFT requirements with the project teams and the customers.

The assignment

  • Implement, and validate innovative DFT techniques on SOCs and sub-systems. 
  • Define timing constraints for DFT test-modes Insert boundary scan, compression, MBIST-R(epair), OPCG (OCC) for large-scale low-power designs in advanced nodes (7nm and beyond) Generate test patterns, debug-improve fault coverage, support debug of post-silicon test patterns, diagnose memory and scan issues.
  • Work closely with the physical design team in the context of timing violations, signal-power integrity issues, routing congestion, etc. 
  • Work closely with the test engineering team on silicon characterization and validation

Required knowledge and skills

  • 15+ years of experience in digital ASIC design, 10+ years of experience with DFT insertion and ATPG 
  • Basic fluency with Verilog or VHDL to write code for test logic when needed Experience as a DFT lead defining chip- and block-level DFT specifications in at least one project with hierarchical DFT 
  • Hands-on experience with defining SDC constraints for DFT, and inserting-verifying boundary scan, compression, MBIST & repair, OPCG or OCC, ATPG, fault coverage improvement, test debug, for large low-power designs in advanced nodes (7nm and beyond) 
  • Expert knowledge in IEEE 1149.1, 1149.6, and 1687 (IJTAG) standards and associated file formats (ICL, PDL) 
  • Preferably previous experience with defining a DFT flow Experienced in EDA tools such as Genus & Modus (Cadence), Tessent (Siemens), Synopsys toolset and simulation tools 
  • Experience using Tessent SSN is a plus 
  • Experienced in scripting languages especially TCL

What we offer

We offer you an exciting temporary assignment in which you will be part of a community that makes the impossible possible. Together, we shape the technology that will define the society of tomorrow.
  • Duration of the assignment, 6 months, with extension if applicable
  • Desired start date: 16/03/2026
  • Work regime: full time 

Location

We provide the flexibility to work both from our office premises and remotely from home. This to maintain a healthy work-life balance while being an integral part of our team. An onsite presence of 3 days a week is required. It's not possible to work 100% remote. 

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