Event-based modeling of high-performance data converters and frequency synthesizers.
Master projects/internships - Leuven | Just now
Explore the framework for system-level design of high-speed integrated circuits.
The increase of data rate in modern communication systems reflects on exacting specifications for the integrated electronic circuits at their core. The current and future bottleneck for high-speed communication lies in the timing accuracy (jitter) of the frequency references and the data converters at each end of the communication links. Conventional system-level modelling rarely captures both standard functionality of the system and its noise performance, which is typically evaluated in a separate and simplified linear model. Event-based modeling in HDL instead allows to both efficiently evaluate the actual noise performance of high-speed circuits and to test their functionality with one-to-one mapping to the circuit design tools. Focus of this work will be on modelling of such system in such a way, starting with frequency synthesizers and possibly extending to data converters and whole wireline links.
Type of Internship: Internship; Combination of internship and thesis; Thesis
Master's degree: Master of Engineering Science; Master of Science
Required educational background: Electrotechnics/Electrical Engineering; Computer Science
Duration: 6-12 months
For more information or application, please contact the supervising scientists Angelo Parisi (Angelo.Parisi@imec.be) and Nereo Markulic (Nereo.Markulic@imec.be).
Imec allowance will be provided for students studying at a non-Belgian university.