Modelling for Radio-Frequency Design-Technology Co-Optimization (RF-DTCO)

The deployment of 5G and 6G radio systems pushes the requirements on device performance further than ever before. Achieving very high-power efficiency up to mmWave frequencies is critical for such applications. While compound semiconductors technologies promise to meet these goals, their low-cost fabrication on a CMOS compatible platform remains challenging. In this context, innovative III-V and GaN transistors compatible with large-scale Si wafers are currently being developed at imec.

To develop such technology, it is essential to obtain rapid feedback between process development and RF circuit design. This is why DTCO (Design Technology Co-Optimization) methods are applied to the RF domain, enabling the joint optimization of device technology, process parameters, and RF circuit design to improve performance, efficiency, and yield. RF‑DTCO is an iterative, cross‑layer methodology that simultaneously optimizes materials, device structures, parasitics, thermal behavior, and RF circuit architectures using multi‑physics modeling and experiments. Compact models play a central role in RF-DTCO, as they capture both the physics of the transistor and constitute the primary tool for circuit design.

In this project, based on the characterization of advanced IIIV transistors, you will develop and calibrate models that will be used for PA circuit optimization. You will contribute to understand devices physics and optimize technology developments, and interface with the circuit designers to assess the impact of technology choices at the circuit level.

Master's degree: Master of Science, Master of Engineering Science

Required educational background: Nanoscience & Nanotechnology

University Promotor: Bertrand Parvais

For more information or application, please contact the supervising scientist Bertrand Parvais (Bertrand.Parvais@imec.be).

Imec allowance will be provided.