/[NanoIC topic] Defect analysis and mechanical modeling of high aspect ratio structure stability

[NanoIC topic] Defect analysis and mechanical modeling of high aspect ratio structure stability

Master internship, PhD internship - Leuven | More than two weeks ago

Metrology for advanced patterning process

As CMOS scaling progresses, increasing structural aspect ratio (AR) and decreasing critical dimensions (CD) pose great challenges for mechanical stability and defectivity control. High‑AR structures are particularly susceptible to collapse and damage during processing steps such as etching, cleaning, and drying.

 

High‑throughput SEM‑based defectivity inspection tools produce large image datasets, requiring automated algorithms for defect extraction and statistical analysis. By correlating these results with CD‑SEM, X‑SEM, and OCD metrology, stability criteria can be defined for various process conditions. This internship/thesis focuses on developing a data‑driven defectivity analysis pipeline to better understand the mechanical stability of nanostructures under different process conditions.

 

Required Skills

  • Strong analytical and programming skills
  • Experience with image processing and/or statistical analysis techniques


Type of internship: Master internship, PhD internship

Duration: >6 month

Required educational background: Physics, Mechanical Engineering, Materials Engineering

Supervising scientist(s): For further information or for application, please contact XiuMei Xu (XiuMei.Xu@imec.be)

The reference code for this position is 2026-INT-076. Mention this reference code in your application.

Only for self-supporting students.


Applications should include the following information:

  • resume
  • motivation
  • current study

Incomplete applications will not be considered.
Who we are
Accept analytics-cookies to view this content.
imec's cleanroom
Accept analytics-cookies to view this content.

Related jobs

Postdoctoral Researcher in In-Operando Photoemission for Semiconductor Technologies

Join imec at the forefront of semiconductor innovation and help develop next-generation photoemission methods for understanding materials, interfaces and devices at the atomic scale.

R&D Thin Films Engineer

You will develop, optimize, and scale ALD/CVD processes for dielectric and metal thin films to enable next generation chips for advancement in AI.

Computer Vision for Defect Inspection and Metrology: Solving Semiconductor Manufacturing Challenges towards Advanced Process Control using Machine Learning

This PhD project addresses fundamental computer vision challenges arising from this domain, with the semiconductor process flow providing the boundary conditions and practical constraints.

Mathematical Statistical methods for ML algorithms for EUVL

Build up Mathematical Statistical innovative methods to create Machine Learning algorithms and models, tuned to accurately predict and automate characterization of defect-limiting, stochastic-induced, effects on device performance (yield), explicit to massive EUV-patterning proce

Inline metrology with Atomic Force Microscopy: from homogeneous smooth surfaces to high-aspect-ratio multi-material devices

Hiking the mountains and valleys of high-aspect-ratio semiconductor devices

Molecular layer deposition of organic–inorganic hybrid films as novel patterning materials

Enabling advanced sub-7nm patterning schemes through chemistry and material innovations
Job opportunities

Send this job to your email