RISC-V CPU Power and Performance Modelling for imec’s Future Semiconductor Technologies

RISC-V CPU Power and Performance Modelling for imec’s Future Semiconductor Technologies 

As semiconductor technologies and chip architectures are becoming increasingly complex, understanding the interaction between technology and architecture is essential for optimizing performance, power and area of a chip. Technology-architecture co-optimization[1] allows to explore different trade-offs early in the design states to predict the behaviour of chips using future technology before they are fabricated. This requires modelling tools that can capture the right level of detail of a design to make accurate predictions.

This internship will focus on evaluating the impact of future semiconductor technologies on RISC-V CPU microarchitecture performance and power by developing and integrating multi-fidelity modelling approaches ranging from high-level microarchitectural models to RTL-level power simulations.

One particular area of interest is understanding how the complexity of an out-of-order CPU core and uncore microarchitectural structures [2] affect achievable clock frequency, power consumption, and silicon area. The clock frequency of a wide out-of-order superscalar is limited by a few wire-dominated structures [2], namely register renaming, the wakeup and select logic of the issue window, and the bypass logic. Palacharla et al.[2] quantified how these structures’ delay scales with issue width and window size. Their study measured delay only, yet the issue logic is also a major energy consumer [3][4], and the load-store queue (LSQ) are based on complex RAM/CAM structures that scale poorly with capacity and port count [5]. There is little open, reproducible, RTL-grounded complexity data for a modern high-performance core. 

Objectives:

Candidate Profile:

The project will be supervised by researchers at imec in the Compute System Architecture department. imec is a world-renowned research center for nano-electronics and digital technologies, based in Leuven, Belgium. The student is expected to work from the imec Leuven, Belgium campus full time for a period of 6-9 months, beginning as soon as possible.