Solution-Processed Semiconducting Carbon Nanotubes for Future Electronic Applications

Semiconducting single-walled carbon nanotubes (CNTs) are among the most promising materials for next-generation electronics, combining outstanding electrical transport properties with excellent mechanical and thermal robustness. Recent advances in CNT sorting and assembly have significantly accelerated the development of CNT-based electronic devices. High-purity semiconducting CNT dispersions can now be obtained through conjugated polymer sorting techniques, while large-area deposition and alignment methods have enabled the fabrication of wafer-scale CNT arrays. While these developments have significantly advanced CNT technology on its path from Lab to FAB, key material and process integration challenges remain.

In this thesis, you will contribute to multiple aspects of CNT material development, starting from the preparation and characterization of stable semiconducting CNT dispersions, followed by material deposition and post-deposition cleaning. The extraction and assembly of high-purity semiconducting CNTs rely on conjugated polymers, which must be effectively removed after deposition without damaging the CNT material. Through a combination of cleaning process development for CNTs of different diameters and advanced material characterization, this work aims to support the establishment of scalable, integration-compatible CNT processing routes for future electronic applications.

In addition to direct CNT deposition, CNT transfer approaches will be explored as an alternative integration strategy. CNT transfer decouples CNT material optimization from the final target substrate, enabling greater flexibility in process integration and facilitating advanced device architectures that are difficult to realize through direct deposition alone. Within this project, you will contribute to the development and implementation of CNT transfer strategies compatible with semiconductor manufacturing environments. Particular attention will be given to understanding the impact of interfacial cleanliness on transfer quality, material integrity, and process yield. An important part of this work involves hands-on experimentation in imec's cleanroom facilities and exposure to semiconductor process development methodologies.

Your Profile

• Background in Materials Science, Chemistry, Nanotechnology, Physics, Electrical Engineering, or a related field
• Strong interest in cleanroom processing, nanomaterials, and experimental research
• Structured approach to experimental work, including DoE, split planning, and root-cause analysis
• Comfortable with data analysis, documentation, and communicating scientific results
• Motivated to work in a multidisciplinary research environment at the interface of materials science and semiconductor technology