/Student Project: All-digital phase locked loops assisted by a neural net

Student Project: All-digital phase locked loops assisted by a neural net

Research & development - Eindhoven | More than two weeks ago

Next-generation IoT applications have been posing new challenges for frequency synthesizers (or phase locked loops (PLL)), such as for lower phase noise, wider tuning range, and accurate multiple phases, while at the same time requiring low power consumption. In this project, you will address these challenges by exploring new ideas and system level techniques based on machine learning for proposing state-of-the-art frequency synthesizer solutions for energy-efficient RF transceivers.

Student Project: All-digital phase locked loops assisted by a neural net

What you will do

You will be working on the system design of a PLL improving overall performance and robustness by applying machine learning techniques. You will engage in the following tasks :

  • Background and Literature review and brain-storming discussions on state-of-the-art PLL.
  • Experimentation and development of a neural-network algorithm on a targeted dataset
  • System design and implementation in hardware.
  • Analysis and validation of performance based on hardware specific metrics
  • Reporting and documentation
  • In the case of a high-quality work, making design into a fabricated test chip (tape-out).
  • A scientific publication depending on the quality of the results

What we do for you

Being a world-renowned research institute and centre of excellence in micro- and nano-electronics, at IMEC you will be working on a cutting-edge research project, that can have direct and immediate impact. You will be interacting and collaborating with renowned researchers and other international students of diverse backgrounds. You will have access to a state-of-art toolchain to work with, and you will be receiving a bonus allowance as an intern.

Who you are

  • An MSc student eligible to do an internship in the Netherlands.
  • Available for a period of 9-12 months.
  • Interested in the topic of this project and eager to realize high-performance circuits.
  • Able to work independently and to expand knowledge in the field.
  • Understanding the principle of an analog or digital PLL.
  • Some exposure (or followed courses) in machine learning and specifically neural networks.
  • Basic knowledges of CMOS circuits and feedback loops.
  • Good analytical skills (e. g. mathematical skills, logical thinking, etc.).
  • Good CAD skills (e. g. MATLAB/Simulink, Verilog, Python, Cadence, etc.).
  • Good written and verbal English skills.


Does this position sound like an interesting next step in your career at imec? Don’t hesitate to submit your application by clicking on ‘APPLY NOW’.
Got some questions about the recruitment process? Martijn Kohl of the Talent Acquisition Team will be happy to assist you.


Who we are
Accept marketing-cookies to view this content.
Cookie settings
imec's cleanroom
Accept marketing-cookies to view this content.
Cookie settings

Send this job to your email