System Demonstrator Architect for Chiplet Connectivity 

What you will do

As Test Chip Architect, you will be responsible for the design of relevant demonstrators for technology pathfinding., with strong focus on chiplet connectivity. This includes the definition and strategy of the test chip for technology assessment, the specifications of relevant test structures, the measurement and characterization strategy, the planning of the tape-out and the follow up of all the necessary tape-out qualifications. In that role, you will interact with the integration and device teams, testing teams, as well as the System/Design-Technology Co-Optimization (STCO/DTCO) teams in order to drive the test chip project to success.   

Your responsibilities will include:  

• Test chip demonstrator definition and specifications  
• Tape-out planning and project management  
• Measurement and characterization strategy  
• Tape-out qualification  
• Participation in the design of some parts in the demonstrator and final GDS delivery.

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology in imec Cambridge, UK or in imec Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth. 

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits. 

• An exciting position in a rapidly growing, multi-disciplinary team.   
• The chance to interact closely with circuit designers, device experts and process integration engineers   
• High impact and visibility through publications and interactions with imec’s major foundry, fabless and EDA partners.

Who you are

• The ideal candidate will have Master degree in Electronics with at least 5 years relevant industrial or academic experience in circuit design.   
• You have an analog, mixed-signal or digital circuit design background and brought your circuit design to hardware.  
• You have project management knowledge in particular for leading tape-outs. 
• Understanding of the basic of chiplet connectivity.  
• Knowledge of interconnect standard as UCIe, (LP)DDRx, etc is a plus. 
• You are acquainted with circuit design tools, including layout and circuit simulation (Virtuoso IC design, Hspice, Calibre DRC/LVS,…)  
• You are acquainted with measurement equipment. You can understand their limitations and take those into account in your design for test strategy.   
• Experience with either PCB, demo board design or FPGA programming is a plus.  
• You have worked in multi-disciplinary teams, ideally both interacting with hardware designers as well as EDA vendors and foundry partners. 
• You have a critical mindset, eager to explore new challenges in the future and evolve together with the changing R&D demands   
• You are an open and constructive team player.  

IMEC and its affiliates will not accept unsolicited resumes from any source other than directly from a candidate. IMEC will consider unsolicited referrals and/or resumes submitted by vendors such as search firms, staffing agencies, professional recruiters, fee-based referral services and recruiting agencies (hereafter “Agency”) to have been referred by the Agency free of charge. IMEC will not pay a fee to any Agency that does not have a prior written agreement with IMEC, validated by its HR department, in place regarding a specific job opening and allowing to submit resumes.