Technology-aware design partitioning for heterogeneous systems

Electronic systems are increasingly built from more than one technology: different process nodes, different device and memory technologies, fixed and reconfigurable fabrics, stacked or side by side in one package. Each option has its own cost, speed, energy and risk, and the boundaries between them have costs of their own. Design flows still treat the technology as a single given, and the choice of where a design should be split, and what the split itself costs, is largely left to experience.

The student will work on a partitioning and exploration framework for heterogeneous systems: cost models that describe each technology option and the interfaces between them, a partitioning method that optimises power, performance, area and cost together, and an evaluation on representative designs that separates what the technology mix contributes from what the tools contribute.