Inline metrology with Atomic Force Microscopy: from homogeneous smooth surfaces to high-aspect-ratio multi-material devices

The rapid evolution of semiconductor technology has led to devices with increasingly complex three-dimensional architectures, such as gate-all-around (GAA) and complementary field-effect transistors (CFET). Accurately characterizing the topography of these high-aspect-ratio (HAR) features presents significant challenges as this requires resolving deep, narrow, and densely packed geometries without compromising material integrity or measurement fidelity. This proposal aims to explore advanced topographical characterization methods, with a particular focus on Atomic Force Microscopy (AFM), to address the unique demands posed by HAR structures in modern semiconductor devices.

AFM operates by scanning a sharp tip across the surface of a sample while maintaining a very small distance between the tip and the surface. As the tip interacts with the surface features, forces between the tip and the sample cause deflections in the cantilever holding the tip, which are detected by a laser system and then translated into high-resolution topographical maps. This allows AFM to characterise surface features at the nanometre scale without damaging the sample. This powerful technique is already widely used in the semiconductor industry, but data interpretation commonly assumes that the surface-tip interaction is material- and pattern-agnostic. This is obviously valid on a homogeneous smooth surface but becomes questionable on the HAR structures with many different materials constituting modern semiconductor devices. As a result, artefacts have been observed when measuring inhomogeneous structures (e.g. hybrid bond pads and two-dimensional materials) or when characterizing HAR structures (e.g. GAA and CFET). 

The objective of this research is to develop the fundamental understanding of the tip-surface interactions to enable the development of robust methodologies for precise topographical analysis of inhomogeneous and/or HAR features. The PhD candidate will carry out an in-depth study of the tip-surface interactions by systematically looking at the force-distance curves obtained on structures with an increasing complexity. We will start from homogeneous surfaces and eventually target HAR inhomogeneous devices. To study separately the impact of tip apex and sidewall interactions with the analyzed surface, we will also consider homogeneous HAR structures as well as smooth inhomogeneous samples. In the process, the selected PhD candidate will be exposed to our latest and greatest structures in the exciting and emerging fields of GAA, CFET, high-NA EUV, 3D memories and interconnects. The candidate will be in direct contact with the imec ecosystem of processing and metrology suppliers. The outcomes are expected to contribute valuable insights into process optimization and quality control, ultimately supporting continued innovation in semiconductor device fabrication.