/Modelling pathways to reduce the environmental impact of semiconductor fabs

Modelling pathways to reduce the environmental impact of semiconductor fabs

Master projects/internships - Leuven | More than two weeks ago

Analyze and recommend strategies for semiconductor fabs in order to reduce their environmental impact over time.

Context

The semiconductor industry is not only growing rapidly, but its manufacturing processes are increasing in complexity, requiring more and more energy, water, and materials. With those natural resources already under strain, to remain compatible with planetary boundaries (e.g., to align with the drastic emissions reduction required to mitigate climate change), it has become critical for technological advancement to integrate environmental sustainability “by design”. To tackle this challenge, the SSTS program at imec is working along with partners from across the value chain to assess and improve the sustainability of the semiconductor industry.

 

The central tool to this endeavour is a “virtual fab” model that simulates high-volume manufacturing semiconductor fabs with all the related flows and their environmental impacts (accessible through the imec.netzero webapp). Besides understanding the impact of existing technologies, this bottom-up model allows to determine the key environmental hotspots and provide recommendations on their mitigation.

 

Objective

This internship will improve the recommendations for the environmental impact reduction pathways of semiconductor fabs. This will be achieved by:

  • Researching and simulating mitigation strategies not yet present in the model (e.g., on-site renewable energy generation and storage, greener production of bulk gases, heat generation with heat pumps, increased circularity of materials within the fab, etc.). This modelling will follow a life-cycle analysis approach.
  • Identifying high-priority (combinations of) mitigation measures based on a multi-criterion analysis (combining environmental savings with implementation and maintenance costs, ease of installation, etc.).

 

Responsibilities

You will actively engage in the research and modelling of a few selected mitigation options, and implementing and testing those models into the imec.netzero virtual fab code. This will involve working closely with both our research team to understand the nuances of semiconductor manufacturing processes and life-cycle assessment methodology, as well as with the coding team to ensure seamless integration of your models within the imec.netzero system. Your contribution will greatly enhance the environmental impact reduction roadmaps of semiconductor production.

 

Skills and Learning Objectives:

Applicants are expected to have a general background in engineering and have solid experience in Python programming. They have the desire to gain proficiency and enhance their skills in the following key areas:

  • Semiconductor Manufacturing Processes
  • Environmental Impact Assessment and Life-Cycle Analysis
  • Clean technology modelling
  • Professional Software Engineering (architecture, documentation, clean code)


Type of project: Internship, Thesis, Combination of internship and thesis

Required degree: Master of Engineering Technology, Master of Science, Master of Engineering Science

Supervising scientist(s): For further information or for application, please contact: Vincent Schellekens (Vincent.Schellekens@imec.be)

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