Master projects/internships - Leuven | Just now
Advanced Dielectric Etch Strategies for CFET MOL at Tight Pitch Nodes
Summary of Research Project:
As the semiconductor industry moves beyond FinFETs toward Complementary FETs (CFETs) to enable continued transistor scaling, the Middle of Line (MOL) interconnect region faces new challenges. CFET requires tight-pitch dielectric etching to integrate vias and contacts in vertically stacked N/P devices. The project aims to investigate and optimize dielectric etch processes for ≤50nm pitch CFET middle-of-line (MOL) integration.
The reliability and performance of CFET devices depend on the etch process quality in these dense regions, especially:
The intern will work on:
Type of Project: Combination of internship and thesis
Master's degree: Master of Science; Master of Engineering Science
Master program: Chemistry/Chemical Engineering; Materials Engineering; Nanoscience & Nanotechnology; Physics
Duration: 1 year
For more information or application, please contact the supervising scientist Tanushree Sarkar (tanushree.sarkar@imec.be).