/Reliability of high-k dielectrics for 2.5D MIM capacitor applications

Reliability of high-k dielectrics for 2.5D MIM capacitor applications

PhD - Leuven | Just now

Ready to help us build the materials of tomorrow by understanding their degradation mechanisms?

To further increase transistor densities, several 3-D integration technologies have been adopted by the industry. Among them, positioning the power delivery network on the back side of the wafer represents the most promising approach. This technology offers the advantage of placing the decoupling capacitors, a key component of advanced integrated circuits (IC), directly in the interconnect stack, maximizing their efficiency. 

 

Yet, the constant search for more complex systems with ever increasing performances relies on a continual down-scaling of device dimensions. Consequently, shrinking the area occupied by MIM capacitors is essential while a constant increase of their capacitance values is required to maintain their decoupling performances. Achieving larger capacitance densities, while preserving a minimal thickness to minimize the leakage current, requires using high-κ dielectrics with permittivity larger than 40 in combination with imec 2.5D MIM capacitor concept. In this aspect, doped hafnium-zirconium oxide dielectrics are for example a promising solution, offering the potential to reach permittivity in excess of 40.

 

The aim of this PhD is to understand the intrinsic degradation mechanisms in advanced high-k dielectrics under electrical stress to help identifying possible mitigation strategies. A special emphasis will be placed on understanding the impact of the dielectric composition, and of the various process choices on the defect generation rate and on the nature of the defects. This fundamental understanding will enable the development of high-performance films with enhanced reliability. In more details, the following achievements are expected:

  • Reliability data will be collected using constant voltage stresses, performed at various voltages and temperatures to trigger dielectric degradation;
  • Data preparation and data analyses will be performed by the student;
  • Fundamental understanding of the nature of defects created in these dielectrics;
  • Building dielectric reliability models calibrated and validated with experimental data,  allowing product lifetime predictions;
     

    To reach these goals, the following activities are foreseen:

     
  • Deep understanding of the degradation mechanism in high-k dielectric films.
  • Reliability characterization of high-k dielectrics by electrical measurements, failure analysis and physical analysis of experimental test structures, to identify possible dielectric failure modes and relative mechanisms;
  • Design of new test structures to assess the reliability performance of these films in imec 2.5D integrated MIM capacitors;
  • Statistical data analysis of reliability data extracted from electrical characterization;
  • Building of analytical/computer models for dielectric lifetime predictions;
  • Interaction with 3-D process integration engineers to provide them feedback on the reliability characterization results.
     
 
 


 


 

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Top left: schematic of an advanced IC utilizing the back side power delivery network technology. Top right: schematic of imec 2.5D MIM capacitor concept. Bottom: TEM characterization of an advanced high-k multi-layer stack as deposited.
 


 

Required background: Material Science, Engineering Technology, Si Process Technology

Type of work: 40% Experimental, 20% Interpretation, 20% Literature, 20% Modeling and simulations

Supervisor: Kristof Croes (KU Leuven)

Daily advisor: Emmanuel Chery

The reference code for this position is 2027-029. Mention this reference code in your application.

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