Master internship - Leuven | Just now
The growing demand for energy-efficient data storage and computing is driving the development of non-volatile memory technologies. Magnetic Random Access Memory (MRAM) is a promising candidate, combining non-volatility with fast operation and good scalability. Its basic element, the Magnetic Tunnel Junction (MTJ), consists of two ferromagnetic layers separated by an ultrathin insulating barrier, with information encoded in the magnetization state of the free layer and electrically read through the Tunnel Magnetoresistance (TMR) effect.
Different mechanisms can be used to switch the free-layer magnetization. Spin-Transfer Torque (STT) uses a spin-polarized current flowing through the MTJ and has reached a high level of technological maturity. Spin-Orbit Torque (SOT) instead generates the switching torque through a current flowing in an adjacent layer, separating the write and read paths. Despite their different implementations, both approaches rely on large current densities for magnetization switching, making write-energy reduction an important challenge for future MRAM technologies.
Voltage-controlled magnetization switching offers an alternative route toward ultra-low-power MRAM by exploiting electric-field effects rather than relying primarily on large write currents. Different approaches have been explored, including magnetoelectric and magneto-ionic mechanisms. Among them, Voltage-Controlled Magnetic Anisotropy (VCMA) is particularly attractive because it enables direct electrical modulation of magnetic anisotropy while remaining compatible with MTJ technology [1]. However, conventional VCMA switching still faces important limitations, particularly the need for symmetry breaking and the stringent pulse-timing requirements associated with precessional switching [1,2].
At imec, we are developing novel device concepts and magnetic stack architectures based on VCMA, aiming to overcome some of the limitations of conventional VCMA devices, particularly those related to precessional switching and externally applied magnetic fields.
Within this framework, the student will investigate novel magnetic stacks and devices through electrical, magnetic, and material characterization. The experimental work will be complemented by micromagnetic modelling using tools such as OOMMF and MuMax3 to better understand the underlying magnetization dynamics and switching mechanisms. Close collaboration with imec researchers working on magnetic materials and devices will connect material properties, device characteristics, and modelling toward the development of voltage-controlled MRAM.
We are seeking a highly motivated candidate with a background in physics or engineering, a strong interest in experimental nanodevice research, and a passion for advancing next-generation memory and logic technologies, which are gaining significant momentum through European semiconductor initiatives such as the European Chips Act [3].
References
Type of internship: Master internship
Duration: 12 months
Required educational background: Physics, Materials Engineering, Nanoscience & Nanotechnology, Electrotechnics/Electrical Engineering
Supervising scientist(s): For further information or for application, please contact Daniele Narducci (Daniele.Narducci@imec.be)
The reference code for this position is 2026-INT-351. Mention this reference code in your application.
Only for self-supporting students.
Applications should include the following information: