Tuesday February 27th, 2018 - QAMeleon “Sliceable multi-QAM format SDN-powered transponders and ROADMs Enabling Elastic Optical Networks”, a new EU-funded project under the H2020 ICT 2016-2017 – Photonics KET Call and the initiative of the Photonics Public Private Partnership, was launched at January 1rst, aiming to scale metro and core networks to 128 Gbaud speed via the development of SDN-enabled transceivers and ROADM node architectures that support sliceable and reconfigurable optical data flows. The project has duration of 4 years and a budget of 7.999.558,75 €. The project coordinator is the Institute of Communications and Computer Systems - National Technical University of Athens (GR) and it comprises a consortium of 16 partners across the whole value chain including hardware/software technology developers, component and system vendors and network providers (Alcatel-Lucent Bell Labs France/Nokia Bell Labs France (FR), Telecom Italia SPA (IT), Finisar Germany GMBH (DE), Finisar Sweden AB (SE), Optocap Ltd (UK), VPI Photonics GmbH (DE), Nextworks (IT), Smart Photonics BV (NL), Vario Optics AG (CH), Fraunhofer-Gesellschaft Zur Förderung der Angewandten Forschung E.V (DE), Aristotelio Panepistimio Thessalonikis (GR), Interuniversitair Micro-Electronica Centrum (BE), Technische Universiteit Eindhoven (NL), III-V Lab (FR) and Danmarks Tekniske Universitet (DK)).
The increasingly volatile traffic stemming from the new internet services sets busy-hour internet on a compound annual growth rate (CAGR) of 36% which drives the market of 200G shipments and the development of the first 600G products. While component and system vendors are well underway with the development of their 64 Gbaud portfolio, the enabling technologies to shift to the next gear of 128 Gbaud are urgently being sought. At the same time, telecom operators and system vendors target to achieve better Quality-of-Service and higher bandwidth at the same price for their end users by adopting software-defined networking (SDN) concepts that will make their networks more efficient and more dynamic. In this realm, QAMeleon will develop the underlying technology that will enable the next generation of a sliceable bandwidth-variable transponder (S-BVT) white box operating at 3 Tb/s and novel CDCG (Colorless, Directionless, Contentionless, Gridless) ROADM node architectures for both metro-core networks and metro-access networks including emerging 5G applications.
The heart of the S-BVT will comprise high performance InP IQ Mach Zehnder modulator arrays with 75 GHz electro-optic bandwidth, low drive voltage requirements (Vπ = 1.5V) and on-chip monolithically integrated polarization handling elements, empowered by the combination of high speed ( >100GHz ) InP-HBT electronics technology and high resolution (128GSa/s) SiGe electronic ICs. Optical signals will be generated by the development of ultra low-linewidth lasers ( <100 kHz ) on InP which will be detected by use of polarization diversity coherent receiver technology comprising balanced photodetector arrays on InP and InP-HBT TIAs both demonstrating over 100 GHz bandwidth.
With respect to ROADM node design, QAMeleon will scale state-of-the art WSS capabilities by the combination of integrated InP waveguide front-end PICs with Liquid Crystal on Silicon (LCoS) micro-optics technology on a Electro-optic PCB substrate and will build a 1x24 WSS prototype with 12.5 GHz granularity exhibiting 30% smaller footprint compared to commercial 1x20 LCoS-based WSS products. The latter readily translates to larger port count within the same WSS package and smaller number of WSS elements per node, yielding more than 40% footprint reductions per I/O port. Further to the above, the project will develop large scale Multi-Cast Switch (MCS) chips exploiting mature InP technology platform, which will comprise the basic components of 8x24 transponder aggregators (TPAs). The 8x24 TPAs together with the 1x24 WSSs will provide the fundamental building blocks for metro-regional and metro-core node architectures. QAMeleon will also develop a fast 1x4 WSS with ultra-low (<20 ns) switching time suitable for new slotted architectures for 5G networks. The latter will comprise monolithic wavelength blockers based on the combination of ultra-fast SOAs and 4-channel AWGs on InP technology, both polarization independent that will be hybridly integrated on a Electro-optic PCB motherboard yielding 5 times footprint improvements and 11.5 times power consumption benefits.
QAMeleon will develop the necessary DSP toolkit and SDN extensions for both the S-BVT and ROADM white boxes in order to create and manage flexible network slices in a reconfigurable and dynamically controlled manner. The developed prototypes will be tested under laboratory and field trial conditions based on specific uses cases and metro/regional DCI and 5G network scenarios.
In QAMeleon, imec is responsible for the development of ultra-high-speed digital-to-analog convertors (DAC). A novel time interleaving concept allows to aggregate the data rate of two 64 GSample/s DACs resulting in a combined sampling rate of 128 GSamples/s. The SiGe DAC will be designed to allow thigh interfacing with the InP driver designs developed by III-V Lab.
Driven by user needs, the project aims to bridge innovative research in optical networking with near-market exploitation, achieving transformational impact in energy consumption and cost/bit that will allow metro and core networks to continue to scale. QAMeleon’s targeted prototypes address a vigorous multi-billion Euro market and the industrial partners of the consortium hold considerable market shares across the value chain. To this end, QAMeleon aims to industrialize the foreground knowledge that will be generated within the project and establish viable exploitation paths in order to reinforce the European industrial competitiveness.
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28 February 2018