/Advanced Characterization of Ultra-Scaled 2D Transistors for Future CMOS Technologies

Advanced Characterization of Ultra-Scaled 2D Transistors for Future CMOS Technologies

PhD - Leuven | Just now

Uncover the hidden physics of ultra-scaled MoS₂ transistors and help shape the next generation of CMOS technology beyond silicon.

Background:

Two-dimensional semiconductors such as MoS₂ are promising channel materials for CMOS technologies beyond the 2 nm node due to their atomic thickness and excellent electrostatic control. Recent progress has enabled ultra-scaled MoS₂ transistors on 300 mm wafers, but further understanding of carrier transport, interfaces, defects, and device variability is required for industrial adoption.

This PhD will combine device fabrication with advanced electrical characterization to identify the mechanisms limiting 2D-transistor performance. The candidate will fabricate MoS₂ devices in imec’s cleanroom and investigate them using capacitance-voltage (C-V), low-frequency noise (LFN), random telegraph noise (RTN), Hall-effect, and cryogenic measurements.

The research will be conducted within imec’s advanced CMOS and Beyond-CMOS programs in collaboration with process engineers, device physicists, materials scientists, and modelling experts.


What you will do:

1. Fabricate advanced MoS₂ transistor structures

  • Fabricate ultra-scaled MoS₂ transistors using imec's Xplore lab cleanroom infrastructure.
  • Participate in process integration and device development activities.
  • Design and fabricate dedicated test structures for advanced characterization.
  • Investigate the impact of process variations on device performance.

2. Perform advanced electrical characterization

  • Conduct CV measurement to evaluate dielectric quality and interface trap density (Dit) and band tail states.
  • Perform low-frequency noise (LFN) and random telegraph noise (RTN) measurements to investigate defect activity.
  • Extract carrier mobility, contact resistance and disorder-oriented transport parameters through Hall effect and four-point probe (4pp) measurements with cryostat down to sub-10 Kelvin.

3. Develop device models and physical understanding

  • Analyze experimental results using semiconductor transport theory.
  • Develop models describing defect-assisted transport and charge trapping.
  • Correlate electrical performance with material and process properties.

Expectation of workload

The PhD combines approximately:

40% device fabrication and process integration

  • Cleanroom processing
  • Device fabrication
  • Test structure design
  • Technology development

40% electrical characterization and measurements

  • C-V characterization
  • Low-frequency noise measurements
  • Hall-effect characterization
  • Cryogenic measurements
  • Reliability and variability studies

20% scientific analysis and dissemination

  • Physics-based modelling
  • Data analysis
  • Publications
  • Conference participation

What we do for you

  • A fully funded PhD position at imec and a partnering university.
  • Access to world-leading semiconductor fabrication facilities.
  • Training on advanced characterization equipment, including cryogenic and Hall measurement systems.
  • Collaboration with internationally recognized experts in CMOS and 2D-material technologies.
  • Opportunities to contribute to next-generation transistor development beyond silicon.
  • Opportunities to publish in high-impact journals and present at leading international conferences.
  • A multidisciplinary research environment combining materials science, device physics and semiconductor technology.

Who you are:

  • You hold a Master's degree in Electrical Engineering, Electronics Engineering, Physics, Materials Science or a related field.
  • You have a strong interest in semiconductor devices and emerging transistor technologies.
  • You enjoy combining experimental work with physical modelling and data analysis.
  • You are motivated to conduct independent scientific research and publish your results.
  • You possess strong analytical and problem-solving skills.
  • You communicate fluently in English.

Added advantage to have:

  • Knowledge of semiconductor device physics.
  • Experience with electrical characterization of electronic devices.
  • Familiarity with MOSFET operation and CMOS technology.
  • Experience with cleanroom fabrication processes.
  • Experience with low-noise electrical measurements.
  • Knowledge of semiconductor transport theory.
  • Familiarity with data analysis using Python, MATLAB or similar tools.
  • Experience with cryogenic measurements, Hall-effect characterization or noise spectroscopy.
  • Interest in advanced CMOS, 2D materials, and beyond-silicon technologies.

 


 


 

Required background: Master's degree in electrical engineering, Electronics Engineering, Physics, Materials Science or a related field

Type of work: 40% device fabrication, 40% electrical characterization, 20% modelling and literature

Supervisor: Jan Genoe (KU Leuven)

Daily advisor: Xiangyu Wu

The reference code for this position is 2027-165. Mention this reference code in your application.

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