/CNT material cleaning and device fabrication

CNT material cleaning and device fabrication

Master projects/internships - Leuven | More than two weeks ago

Join the team that explores next generation materials for high-performance electronics.

Aligned semiconducting carbon nanotubes (CNTs) are a promising material candidate for next-generation field-effect transistors (FETs) due to their unique intrinsic properties, e.g. ballistic transport, excellent charge carrier mobility and high thermal conductivity. Significant progress in the recent years in CNT purification, assembly from solution into densely aligned arrays and subsequent integration in devices demonstrates that the CNT material remains not only scientifically attractive but offers a technologically feasible pathway towards high-performing FETs.

In this work you will contribute to the establishment of a CNT device technology platform at imec with the focus on material development and characterization. The goal of this work is twofold:

(1) Set up and optimize a protocol for optical lithography for aligned CNT device fabrication.

(2) Examine the contamination level and options of polymer residue removal for the CNT devices.

Residual polymer, which might not be fully removed from the CNT material during the fabrication, is one of the issues of the contact lithography module development and therefore, a follow up cleaning process is required. The major challenge of this work is to enable polymer residue removal with minimal damage to the channel material and assess the cleaning effect using e.g. AFM, Raman, XPS and electrical measurements. Next to the standard solvent and anneal based cleaning approaches, remote plasma technique will be explored as an alternative method for the polymer residue removal. Finally, the process of optical lithography-based fabrication and its influence on the electrical properties of the CNT material will be evaluated.


Type of project: Combination of internship and thesis

Duration: 6-12 months

Required degree: Master of Science

Required background: Materials Engineering, Nanoscience & Nanotechnology, Chemistry/Chemical Engineering

Supervising scientist(s): For further information or for application, please contact: Jean-Francois de Marneffe (Jean-Francois.deMarneffe@imec.be) and Marina Timmermans (Marina.Timmermans@imec.be) and Himanshu Sharma (Himanshu.Sharma@imec.be) and Luca Mana (Luca.Mana@imec.be)

Imec allowance will be provided for students studying at a non-Belgian university.

Who we are
Accept analytics-cookies to view this content.
imec's cleanroom
Accept analytics-cookies to view this content.

Related jobs

Chemically-tuned 2D materials for next-generation nanoelectronics using first-principles quantum transport modeling

Explore chemically-tuned 2D materials for future nanoscale devices using state-of-the-art atomistic quantum-transport techniques

[NanoIC topic] Mathematical Statistical methods for ML algorithms for EUVL

Build up Mathematical Statistical innovative methods to create Machine Learning algorithms and models, tuned to accurately predict and automate characterization of defect-limiting, stochastic-induced, effects on device performance (yield), explicit to massive EUV-patterning proce

[NanoIC topic] Sustainable Design-Technology Co-Optimization for Advanced Technologies

Enabling the transition from PPA(C) to PPACE for the exploration of advanced technologies, such as CFET, 2D, and IGZO, taking into account the cost and environmental cost linked to integration and process assumptions.

[NanoIC topic] Scaled source/drain epitaxial layers for nanosheet & complementary field-effect transistors

Unravel the physical reactions governing Si:P and SiGe:B epitaxy in confined volumes to unlock the potential of modern devices

[NanoIC topic] Research on High Aspect Ratio Dielectric Etch for 3D Integration

Understand mechanisms governing the cryogenic plasma etch processes and fabricate high aspect ratio patterns for the memory and logic technology nodes of the future.

Exploration of the mechanisms of Atomic Layer Etching to enable anisotropic etching of Co-based alloys

Become a metal nano-carver to build next-generation CMOS!
Job opportunities

Send this job to your email