Design of integrated power amplifiers and transmitters for mobile applications in the FR3 band

Nowadays’ society cannot be imagined without wireless communication. Billions of subscriptions are in use today and the usage of wireless data per user is still growing. Also, the demand for higher wireless data rates is not stopping. The low-GHz range of the electromagnetic spectrum, that has already been used for many years , is congested and can no longer accommodate a significant growth of the cellular network. To alleviate this problem, new spectrum has been allocated in the millimeter wave frequency range.

Recently, the frequency spectrum between 7.125 GHz and 24.25 GHz, also called FR3,  has been allocated for wireless communication. This spectrum will not be available as a contiguous band, as some parts are already in use for other applications such as satellite communication in the Ku band. The FR3 band is attractive  for communication usage, as it still offers good coverage combined with wider RF bandwidths (≥ 100 MHz) compared with the sub-6 GHz frequency bands.

The entire transceiver electronics for the sub-6 GHz communication has become almost a commodity, whereas transceivers still need to be developed for FR3. An important challenge for FR3 transceivers is the generation of sufficient transmit power at a high efficiency. In addition, the transmit part should behave in a linear way, as nonlinear distortion degrades the signal quality. In a classical power amplifier, linear operation typically results in  low efficiency. In this PhD, you will analyze a wireless transceiver and propose and design circuits which result in an efficient overall solution which fulfills the system requirements. This may go beyond the pure power amplifier (PA) architecture  as the PA can be combined with the DAC and the up-conversion resulting in a  so-called digital transmitter. Such architectures have been proposed for sub-6GHz communication, but it is to be investigated whether they can be transposed to the low mm-wave range of FR3. Combining the high bandwidth with sufficient power generation at high efficiency will be the main challenges of this work. Depending on the findings, the proposed architecture will be realized in advanced CMOS or in co-integration with a III-V semiconductor technology for the output stage.