IGZO based circuitry exploration for CMOS2.0 Circuits
Master projects/internships - Cambridge | Just now
Bridging logic and memory in CMOS 2.0 with IGZO: from capacitor-less eDRAM cells to heterogeneous system integration.
Indium-Gallium-Zinc-Oxide (IGZO) thin-film transistors combine low leakage, BEOL compatibility, and high mobility, making them attractive for CMOS 2.0, which emphasizes heterogeneous integration, advanced packaging, and system-level co-optimization. This paradigm shifts beyond traditional scaling by enabling logic, memory, and specialized functions to coexist in dense, energy-efficient architectures. IGZO’s properties support innovative memory concepts such as capacitor-less eDRAM alongside conventional logic, offering new design flexibility for performance and power optimization. This internship will explore IGZO-based circuitry for both conventional and memory-centric designs within CMOS 2.0, targeting integration strategies for heterogeneous systems.
Research Objectives:
- Assess IGZO-based eDRAM cell architectures for retention, area efficiency, and compatibility with CMOS 2.0 heterogeneous platforms.
- Develop design approaches for incorporating IGZO logic and memory blocks into advanced CMOS 2.0 circuitry to optimize system-level performance.
Type of Internship: Master internship
Location: Cambridge or Leuven
Duration: 6-8 months
Master's degree: Master of Engineering Science; Master of Science
Required educational background: Electrotechnics/Electrical Engineering; Computer Science
For more information or application, please contact the supervising scientists Sahan Gamage (sahan.gamage@imec-int.com), Arvind Sharma (arvind.sharma@imec.be) and Fernando Garcia Redondo (fernando.garciaredondo@imec-int.com).
Imec allowance will be provided.