Low-power and low-cost silicon photonic interconnects

Silicon photonics, the integration of optical systems with CMOS-compatible fabrication processes, stands as the most promising pathway for enabling exponential bandwidth growth in telecommunications and data communication networks. Major industry leaders have already embraced this technology: Intel has launched high-volume 100 Gbps silicon photonics transceivers for data centers, Nvidia and TSMC are developing multi-GPU solutions leveraging silicon photonics, and Samsung seeks to enhance processing speeds while reducing power consumption and thermal output through silicon photonics integration. Imec’s Optical I/O program, together with our partners, targets optical interconnect scaling for 1cm-1km distances through advancing silicon photonics technology. Utilizing an in-house 300 mm CMOS pilot line, the imec Optical I/O program has achieved wafer-scale fabrication of state-of-the-art optical devices, including those designed for high-speed optical communications at data rates of 50 Gbps and beyond. However, there are increasing demands low power consumption and low cost.

This Ph.D. project aims to explore and develop novel integrated and waveguide-coupled III-V micro-LED light source solutions, aiming at highly efficient and reliable operation at high temperatures, as required for closely integration with advanced CMOS logic. Various uLED cavity and waveguide coupling architectures will be explored including in-plane and out-of-plane configurations targeting optimum waveguide coupling efficiencies. Particular attention will be paid to the III-V active layer design, aiming at maximizing the uLED modulation speed while retaining high wall-plug efficiency. The most promising designs will be implemented in the imec fab/lab, leveraging emerging wafer-scale GaN or GaAs-based integration technology at imec. Finally, their application in on-chip photonic systems for optical interconnects and optical compute applications will be evaluated.

In this research, the Ph.D. student will:

• Review the existing literature for silicon-integrated III-V microLEDs.
• Design, simulate, layout and characterize integrated microLEDs, capable of operating at high temperature (>100C) with high efficiency (>20%) and high waveguide coupling efficiency, when integrated deeply in advanced CMOS compute stacks.
• Coordinate the fabrication of the best designs, leveraging emerging wafer-scale GaN and GaAs-based integration technology at imec, based on direct growth, die-to-wafer bonding, wafer-to-wafer bonding, or transfer printing.