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Reliability characterization of advanced CMOS nodes with low-frequency noise
PhD - Leuven | Just now
Turning device noise into insight for future CMOS reliability.
Advanced CMOS nodes, such as nanosheet-based transistors, introduce new architectural complexities that challenge conventional reliability evaluation methods. Moreover, physical degradation mechanisms become harder to detect and predict using standard techniques as devices scale down. This PhD project investigates low-frequency noise as a non-destructive and sensitive tool to assess reliability in these emerging technologies. The research aims to establish a fundamental link between noise behavior and key failure mechanisms, including bias-temperature instability (BTI) and time-dependent dielectric breakdown (TDDB). Through experimental characterization and physics-based modeling, the project will develop new methodologies and knowledge to support reliability screening and robust design of future CMOS technologies. The outcomes will contribute to improving the fundamental understanding of reliability in nanoscale devices and enable more efficient development of next-generation integrated circuits.
Required background: Electrical Engineering or equivalent
Type of work: 60% experimental, 30% modeling/simulation, 10% literature
Supervisor: Kristof Croes
Daily advisor: Ruben Asanovski
The reference code for this position is 2026-029. Mention this reference code on your application form.