Reliability Physics and Degradation Mechanisms of Advanced Integrated Photodiodes for Silicon Photonics

Silicon Photonics (SiPho) is rapidly emerging as the platform of choice for high-bandwidth optical interconnects, data center communication, and future quantum and space applications. With industry now moving rapidly toward co-packaged optics to meet the connectivity demands of AI and high-performance computing [1], the performance and reliability of integrated photonic devices have become more critical than ever.     

Photodiodes are central to these systems, converting optical signals into electrical currents with low dark current, high sensitivity, low noise, and fast response. At imec, cutting-edge photodiode architectures are being developed, including deeply recessed Ge-on-Si devices, vertical and lateral avalanche photodiodes (APDs), and III-V photodiodes.

While these technologies push the frontiers of performance, their long-term reliability remains a critical challenge. Strategies to improve performance often rely on doping/material/design optimization and higher electric fields in the junction, but these same conditions can accelerate defect generation and reliability degradation. In fact, phenomena usually associated with transistor reliability, such as bias temperature instability [2], charge trapping [3], and hot-carrier degradation [4], are now increasingly observed in active silicon photonic components under stress [5-7]. Failure mechanisms such as enhanced trap-assisted tunneling, surface/interface degradation, thermal aging, and avalanche-induced instabilities are poorly understood in these advanced architectures. A systematic study combining device physics, reliability testing, advanced TCAD modeling, and state-of-the-art characterization methods is therefore essential.

This PhD project aims to establish a comprehensive understanding of reliability physics in advanced photodiodes. The main objectives are:

• Experimental characterization of the degradation and relaxation kinetics under electrical and thermal stress for various types of integrated photodiodes already fabricated and available at imec: deeply recessed, lateral and vertical APD, etc. (see Fig. a).
• Development of predictive TCAD models capturing degradation pathways such as Shockley-Read-Hall (SRH) generation, trap-assisted tunneling, impact ionization instabilities, and semiconductor/interface degradation effects (see Fig. b). These models will need to be calibrated using the collected experimental data.
• Correlation of experiments with physics-based modeling, linking macroscopic figure-of-merits (dark current, breakdown, bandwidth, noise) to microscopic defect kinetics.
• Guidelines for reliability-aware design of next-generation silicon photonic photodiodes.

The PhD candidate will be part of the Advanced Robustness and Reliability Testing (AR²T) research group, which has an internationally recognized expertise in semiconductor reliability. The candidate will also collaborate closely with researchers from the Optical Interconnect team, ensuring synergy between device reliability and technology development.

The candidate will also have the opportunity to present his results to imec’s industrial partners.

References:

[1] “How silicon photonics technology can address the networking bandwidth demand in cloud datacenters and AI/ML applications”, imec, https://www.imec-int.com/en/articles/how-silicon-photonics-technology-can-address-networking-bandwidth-demand-cloud-datacenter

[2] T. Grasser, “Bias Temperature Instability for Devices and Circuits,” Springer 2013, https://doi.org/10.1007/978-1-4614-7909-3

[3] T. Grasser, “Stochastic charge trapping in oxides: From random telegraph noise to bias temperature instabilities,” Microelectron. Reliab. 2012, https://doi.org/10.1016/j.microrel.2011.09.002

[4] T. Grasser, “Hot Carrier Degradation in Semiconductor Devices,” Springer 2015, https://doi.org/10.1007/978-3-319-08994-2

[5] S. Musibau et al., “Degradation and Recovery Kinetics Study of Vertical and Lateral Ge-on-Si Photodetectors,” IRPS 2024, https://ieeexplore.ieee.org/abstract/document/10529439

[6] A. Tsiara et al., “50 Gbps vertical separate absorption charge multiplication Ge/Si avalanche waveguide photodetectors integrated in a 300-mm Si photonics platform,” ECOC 2023, https://ieeexplore.ieee.org/document/10484560