/Study of switching dynamics in state-of-the-art SOT-MRAM

Study of switching dynamics in state-of-the-art SOT-MRAM

PhD - Leuven | More than two weeks ago

Shape the future of magnetic memory: discover what happens in the first nanoseconds


Magnetic material-based memories are an emerging class of devices promising non-volatility, high-speed and low power [1]. The first generation of memory devices, known as Spin Transfer Torque (STT) magnetic random-access memory (MRAM), are about to hit large scale production for embedded memory replacement. With a view towards second generation MRAM, our team is working on alternative switching mechanisms like Spin-Orbit-Torque (SOT). SOT devices are faster than STT and allow switching speeds below 1 nanosecond. Moreover, decoupling the write and read path improved the endurance of these devices significantly.


State-of-the-art and challenges

A major challenge in SOT-MRAM is its switching failures. Studies of when, but also why, switching failures occur are imperative for the development of these memories. There is a need for in-depth characterization of the switching dynamics with time-resolved measurements to understand the root cause of these switching failures. SOT-MRAM is known to switch at high write currents, indicating a non-trivial impact of Joule heating on reversal dynamics. Though Joule heating is expected to aid in write current reduction, its impact on deterministic switching and device failure mechanisms is poorly understood. This PhD aims to address these questions by combining ultra-fast, time-resolved measurements and thermal simulations. Accurate thermal simulations and at temperature measurements are key to make a reliable characterization.


Experimental details & Methodology

To develop MRAM devices, imec uses a dedicated 300-mm wafer platform in its state-of-the-art cleanroom. The PhD candidate will take part in the characterization of these new types of devices. He/She will develop a measurement framework to accurately study switching dynamics in sub-nanosecond range. Furthermore, the candidate will create a robust statistical workflow designed to extract valuable insights regarding SOT-induced dynamics and reliability challenges. This will be done in collaboration with the MRAM devices group and supervised by Simon Van Beek. In parallel, micromagnetic modelling (OOMMF, mumax) and thermal simulations (Comsol) can be used to support the findings. For data analysis and modelling, basic knowledge on programming in Python can be helpful. For modelling of the failure mechanisms, the PhD candidate can also rely on the support of the reliability expertise center within imec.


For more information, please contact Simon Van Beek (simon.vanbeek@imec.be)

[1]  https://www.imec-int.com/en/articles/mram-technologies-space-applications-unified-cache-memory

Required background: Electrical engineering, Physics

Type of work: literature study (10%), experimental work (60%), modelling (30%)

Supervisor: Bart Soree

Daily advisor: Simon Van Beek

The reference code for this position is 2024-014. Mention this reference code on your application form.

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