article SOT-MRAM
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Research update

Novel SOT-MRAM architecture opens doors to high-density last-level cache memory applications

First demonstration of field-free, gate-voltage assisted SOT-based switching operation in a multi-pillar configuration


Today, three main issues challenge the use of spin-orbit torque magneto-resistive random-access memory (SOT-MRAM) devices in last-level cache memory applications: scalability, dynamic power consumption, and the need for a manufacturable compact field-free switching solution.

At the 2022 IEDM, imec presented a novel SOT-MRAM architecture that solves these issues in one go.

The design improvements, in combination with a high switching speed and >1012 endurance, make the novel device an attractive alternative to SRAM in embedded memory applications.