Next-generation silicon photonics

Introduction

Following Moore’s law, the compute power of logic chips and the capacity of memory have been scaling exponentially over the past few decades. As a result, demand for I/O bandwidth is following a similar exponential trend, soon requiring in the order of Terabyte-per-second I/O aggregate bandwidth.

Our Solution

Join our industrial affiliation program on advanced optical I/O to explore and enable future system-level performance scaling using fully CMOS-compatible silicon-based optical links for datacom network, backplane, board, interposer and chip-level interconnects.

In particular, our research comprises:

1. System level studies
• Optical I/O system roadmaps
• Optical link architecture and benchmarking
2. Si Photonics Integration Technology
• Silicon-based Photonic Integration Platform (PIC)
• High performance Si Photonics devices
• Yield, Reliability Assessment
3. Packaging and Assembly
• CMOS to Si Photonics 3-D integration
• Laser on Si Photonics hybrid integration
• Fiber connectivity to the package/chip
4. System Demonstrators & Benchmarking
• CMOS TxRx circuit optimization for optical ICs
• Silicon prototypes for proof of concept
5. Exploratory Devices and Materials
• Explore novel devices and materials beyond Si: monolithic III-V, advanced Ge(Si),
graphene and others