Analog and digital design of full chips and building blocks.
Our design services give you access to our team of dedicated ASIC design specialists who are familiar with the design flow of deep sub-micron ICs and the EDA tools to perform this task. This team mainly focusses on the ASIC implementation steps after the architecture, or even after the RTL description or net list have been created.
We can help you with deep sub-micron design, overcoming common pitfalls that can cause your circuits to fail: clock-skew, latency of interacting clocks, IR-drop on the power mesh, electro-migration problems, interconnect delays, crosstalk, on-chip variation, the many metal interconnect layers, or low-power design methods. We also have an extensive program for radiation hardened platforms.
We have provided design services in processes from more than 10 different foundries. And this for both SoCs developed in-house and ASICs developed by our eco-system partners, companies, research institutes and universities. Many of these systems combine analog full-custom blocks with digital units including macros (e.g. RAM, ROM, …).
In addition, we have a team experienced in radiation-hardened designs. To that end, our specialists have developed libraries, building blocks and a design methodology as part of our DARE (Design Against Radiation Effects) platforms.
We also support our customers with our technology targeting service, guiding you in selecting the right technology for your design. Our in-house expertise is further enhanced by our local and international design and IP partner programs.