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DTCO for functionalization of backside metals in advanced CMOS nodes using open-source EDA
PhD - Leuven | Just now
Explore the future of CMOS technologies while advancing and democratizing chip-design process with open-source EDA
Efficient utilization of backside metalization present in advanced CMOS nodes is key to enable and leverage technology scaling. The exploration of functionalizing the backside and the power-performance-area-cost (PPAC) benefits can be limited by the availability and capability of commercial EDA tools. During this PhD, the candidate will have the opportunity to tackle specific scaling boosters at block-level by adapting and leveraging open-source EDA tools for synthesis and physical design. This topic offers a unique opportunity to work on the intersection of software development, advanced technology research, and hardware design.
Required background: Electrical & Computer Engineering, Computer Science
Type of work: 50% EDA development, 40% physical design, 10% literature
Supervisor: Wim Dehaene
Daily advisor: Ji-Yung Lin, Moritz Brunion
The reference code for this position is 2026-062. Mention this reference code on your application form.