Imec Improves Performance and Understanding of Stacked Nanowire Gate-All-Around Transistors for N3 and Beyond

SAN FRANCISCO (USA), DECEMBER 3, 2018 — At this week’s 2018 IEEE International Electron Devices Meeting (IEDM), imec, the world-leading research and innovation hub in nano-electronics and digital technology, reports significant progress in process enabling the introduction of gate-all-around (GAA) transistors with vertically stacked nanowires and nanosheets for the N3 technology node. Results include improved Si GAA devices, better understanding of strain engineering in Ge nanowire pFETs, and a comprehensive understanding of reliability and degradation mechanisms of nanowire FETs.

GAA MOSFETs are promising candidates to extend the gate length and gate pitch scaling beyond what is possible with FinFETs. The use of lateral nanowires or nanosheets has the advantage of a process flow that is not so disruptive compared to FinFET processing. And by stacking the nanowires or nanosheets, the concept allows maximizing the drive current for a given footprint. At last year’s IEDM, imec presented first functional circuits; today the research center presents three studies that include process optimizations and a better understanding of strain engineering and reliability in GAA MOSFETs.

A first study shows how process improvements may significantly reduce the nanowire size and improve the shape controllability without degrading the electrical performance. With these improvements, imec made Si GAA devices with a reduced vertical spacing, a large improvement of Ion/Ioff performance and short channel margin for both nMOS and pMOS devices. The results were demonstrated by an improvement of the gate delay from 24ps down to 10ps in a ring oscillator. A second study compared germanium nanowire pFETs with germanium FinFETs and reveaed the marked advantage of the former, mainly due to a more optimal strain engineering. The original demonstration of this work (IEDM 2017) has received the Paul Rappaport Award (presented at the plenary session at IEDM 2018, Monday Dec 3). Last, an extensive mapping of n-, p- Si and p-Ge nanowire FETs in the entire bias space allowed to characterize the various degradation metrics and reveal multiple active degradation mechanisms.

“Gate-all-around nanowire transistors are promising candidates to replace FinFETs for nodes beyond N5, and this without too much disruption,” comments Naoto Horiguchi, distinguished member of the technical staff at imec. “These new results further optimize the processes to realize these transistors and provide us with more understanding, e.g. on optimal strain engineering and degradation mechanisms.” 

Imec’s research into advanced logic scaling is performed in cooperation with imec’s key CMOS program partners including GlobalFoundries, Huawei, Intel, Micron, Qualcomm, Samsung, SK Hynix, Sony Semiconductor Solutions, TOSHIBA Memory, TSMC and Western Digital.

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Hanne Degans
press communications manager - imec

About imec

Imec is the world-leading research and innovation hub in nanoelectronics and digital technologies. The combination of our widely acclaimed leadership in microchip technology and profound software and ICT expertise is what makes us unique. By leveraging our world-class infrastructure and local and global ecosystem of partners across a multitude of industries, we create groundbreaking innovation in application domains such as healthcare, smart cities and mobility, logistics and manufacturing, energy and education.

As a trusted partner for companies, start-ups and universities we bring together more than 4,000 brilliant minds from over 85 nationalities. Imec is headquartered in Leuven, Belgium and has distributed R&D groups at a number of Flemish universities, in the Netherlands, Taiwan, USA, China, and offices in India and Japan. In 2017, imec's revenue (P&L) totaled 546 million euro. Further information on imec can be found at www.imec-int.com.

Imec is a registered trademark for the activities of IMEC International (a legal entity set up under Belgian law as a "stichting van openbaar nut”), imec Belgium (IMEC vzw supported by the Flemish Government), imec the Netherlands (Stichting IMEC Nederland, part of Holst Centre which is supported by the Dutch Government), imec Taiwan (IMEC Taiwan Co.) and imec China (IMEC Microelectronics (Shanghai) Co. Ltd.) and imec India (Imec India Private Limited), imec Florida (IMEC USA nanoelectronics design center).

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