Imec presents breakthrough results in memory and logic at VLSI Symposia

CMOS-compatible Ferroelectric Memory

As a world’s first, imec demonstrated a vertically stacked ferroelectric Al doped HfO2 device for NAND applications. Using a new material and a novel architecture, imec has created a non-volatile memory concept with attractive characteristics for power consumption, switching speed, scalability and retention. The achievement shows that ferro-electric memory is a highly promising technology at various points in the memory hierarchy, and as a new technology for storage class memory. Imec will further develop the concept in collaboration with the world’s leading producers of memory ICs.

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Record-Low Source/Drain Contact Resistivity for PMOS Transistors

Imec also reported record breaking values below 10^-9 Ohm.cm² for PMOS source/drain contact resistivity. These results were obtained through shallow Gallium implantation on p-SiliconGermanium (p-SiGe) source/drain contacts with subsequent pulsed nanosecond laser anneal.

In future N7/N5 nodes, the source/drain contact area of the transistors becomes so small that the contact resistance threatens to become the dominating parasitic factor, resulting in suboptimal transistor functioning. Researchers have therefore been working on techniques to reduce the contact resistance on highly doped n-Si and p-SiGe source/drain contacts, aiming for values below 10^-9 Ohm.cm². Together with colleagues from the KU Leuven (Belgium), Fudan University (Shanghai, China), and Applied Materials (Sunnyvale, USA), imec’s specialists concentrated on p-SiGe contacts, comparing the effects of high-dose Boron and Gallium doping.

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Sub-10nm germanium Gate-All-Around Devices

Imec unveiled new process improvements for next-generation devices. For the first time, scaled strained germanium p-channel Gate-All-Around (GAA) FETs were shown with sub-10nm diameter, integrated on a 300mm platform. In addition, imec has obtained a significant improvement in device performance and electrostatic control with high-pressure anneal (HPA) for both strained germanium p-channel FinFET and GAA devices.

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