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Research update

Imec highlights benefits of 3D-SOC design and backside interconnects for future high-performance systems


3D system-on-chip (3D SOC), enabled by electronic design automation (EDA) and 3D process technologies, is an attractive heterogeneous integration approach for addressing the memory wall in high-performance systems.  

Further performance gains at the system level can be achieved when the backside of one of the integrated wafers is exploited for either power delivery, signal routing or both. 

In this article, Dragomir Milojevic, Geert Van der Plas and Eric Beyne shed light on these promising approaches. 

The benefits of 3D-SOC design and of backside interconnects in specific circuits are highlighted in two papers presented at the 2021 IEEE International Electron Devices Meeting (IEDM).