Optical interconnect research program

Optical links provide increased bandwidths, longer reaches, and lower latencies compared to electrical links. It’s why they’re widely used in datacenters, where data movement between processing units (xPUs) is a critical bottleneck for crunching exploding AI workloads.

Today, these optical links are incorporated as short-reach pluggable transceivers. However, to bring down power usage and latency, two avenues are explored by industry:

• Linear pluggable optics (LPO) that eliminate the DSP from the pluggable – a limited approach for scaling baud rates due to high losses at high frequencies.
• Co-packaged optics (CPO) that move the optical module onto the same substrate as the xPU – reducing energy efficiency down to 5pJ/bit or less.

Looking further ahead, even co-packaged optics will not meet requirements for future workloads. One route to overcome this is to move away from today’s so-called fast-and-narrow approach to a wide-and-slow approach.

This approach leverages compact optics and advanced assembly technologies such as hybrid bonding. It creates interfaces of many parallel optical channels, integrated closer to the xPUs – possibly even underneath in a 3D wafer-scale photonic interposer approach.

The optics and front-end electronics need to operate in a thermally highly challenging environment. Reliability is also essential, as link failures may heavily impact compute loads.

Other forms of AI compared to large-language models, such as agentic and physical AI, may have significantly different traffic patterns. Reconfigurable optical networks, even in the scale-up domain, will become critical. To address this, imec optical interconnect research program is exploring avenues towards low-loss, large-radix optical switches.

Optical interconnects: pre-competitive, long-term research program

Imec’s optical interconnect research program develops the key technology building blocks for achieving these next-generation optical transceivers, up to ten years before anticipated commercial deployment.

The program is accessible to all partners in the value chain: from material and tool suppliers to foundries, OSATS, IDMs, fabless and system companies. It leverages imec’s unique capabilities in:

• Silicon photonics, with over two decades of research resulting in a mature 300mm platform.
• Heterogeneous integration, enabling the use of other materials to overcome the limitations of purely relying on silicon.
• Advanced 3D, with Cu hybrid bonding capabilities such as die-to-wafer (D2W) and wafer-to-wafer (W2W), allowing for the dense integration of photonic and electronic components.
• Electronic IC design knowledge, both front-end and back-end, including high-speed wireline data converters.

To cover both technology- and system-level aspects of prospective connectivity solutions, the optical interconnect research program consists of two parts: the explore (OI-EXPLORE) and demonstrator (OI-DEMO) part.

In addition, the R&D program closely interacts with imec’s holistic cross-technology optimization (XTCO) pillars, in particular the XTCO fabric pillar.

Optical interconnect explore (OI-EXPLORE)

This technology-oriented track contains early pathfinding (up to TRL 3) of materials, processes and novel devices that enable the next generation of optical interconnects:

• Optical modulators, with continued work on GeSi FK electro-absorption modulators (EAM) and front-end integration of III-V-based optical modulators.
• Photodetectors, working towards low-capacitance Ge photodetectors and ultra-high-bandwidth devices.
• Wavelength multiplexing (WDM) filters targeting high-channel-count and athermal devices, and low-loss optical switches based on nano-optical-electromechanic approaches or novel materials such as barium titanate (BTO).
• Integrated lasers and amplifiers, aiming for ultra-low-cost implementations through heterogeneous integration of GaAs on silicon.
• Electro-optical co-packaging, addressing broadband high-channel-count (100-400) surface couplers, integration of PICs with EICs through hybrid bonding, and 3D packaging approaches.
• Testing and reliability, exploring test methodologies and performing reliability evaluations through failure mode and effects analysis (FMEA).

Optical interconnect demonstrator (OI-DEMO)

The second track consists of proof-of-concept (PoC) technology demonstrators of the matured building blocks from OI-EXPLORE, raising TRL levels to 3-5. This involves:

• proof-of-concept (POC) demonstrators to uncover critical aspects in design, realization and testing of co-packaged optics and 2.5/3D optical interconnect implementations
• process flows integrating multiple devices realized as short-loop runs in OI-EXPLORE
• demonstrators of optical switches, based on switches and amplifiers addressed by OI-EXPLORE, and front-end electronics
• manufacturing yield understanding and optimization at the circuit and module level
   

XTCO fabric

Cross-technology optimization (XTCO) takes a holistic approach to system scaling, connecting AI workload challenges to technology innovations. The XTCO fabric pillar in particular addresses the following domains:

• Network architecture: exploring system-level options to reduce link latency, scale bandwidth density, reduce energy consumption, and evaluate the impact of novel technologies such as optical switching at the system level.
• Link modelling: building deep understanding of link performance, including electrical wireline and optical solutions, leveraging projected technology platforms, as well as steering those.
• Circuit architecture: evaluating and establishing novel circuit-level concepts addressing future connectivity needs, leveraging emerging technology platforms.
• Physical architecture: from floorplan and cross section to full transceiver integration concept.

Want to join imec’s optical interconnect research program?

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