imec article BSPDN
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Longread

How to power chips from the backside

Benefits and building blocks of a backside power delivery network

Summary

Future chips may well break the tradition of delivering power through the chip’s frontside: a backside power delivery network (BSPDN) has shown clear performance advantages.

Significant progress has been obtained in enabling the critical process steps, including buried power rail implementation, extreme wafer thinning, and nano-through-Si-via processing.

In this article, Naoto Horiguchi and Eric Beyne explain how it works, quantify the benefits for both 2D ICs and 3D systems-on-chip, and unravel the process flow for making a BSPDN.