Reading Room

Research update

Imec introduces 2D materials in the logic device scaling roadmap

Introduction is backboned by pathfinding work on 300mm integration and insights in device variability 


At the 2020 IEDM conference, imec proposes that 2D semiconductors like tungsten disulfide (WS2) can further extend the logic transistor scaling roadmap. The team laid the groundwork for integrating 2D semiconductors in a 300mm CMOS fab, and worked towards improved device performance. These findings are presented in four IEDM papers, one of which was selected as IEDM highlight.