Naoto Horiguchi is a director of the logic CMOS scaling program in imec, Leuven, Belgium. He started his carrier in semiconductor device R&D in Fujitsu Laboratories Ltd. in 1992. In 1992-1999, he was engaged in device development by using semiconductor nanostructures in Fujitsu laboratories Ltd. and University of California, Santa Barbara. In 2000 to 2006, he was engaged in 90-45nm CMOS technology development in Fujitsu Ltd. as a lead integration engineer. From 2006, he is with imec, Leuven, Belgium, where he is engaged in advanced CMOS device R&D together with worldwide industrial partners, universities and research institutes. His current focus is CMOS device scaling down to 2nm technology node and beyond.
25 August 2021